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SYSCOM-PROREP
France
The EP103B LVDS transmitter supports transmission between the host and the flat panel display up to SXGA+ resolutions. The transmitter converts 25 bits (8bits/color, 2 dummy bits) of Low Voltage TTL data and 3 control bits into 4 LVDS (Low Voltage Differential Signal) data streams. At a maximum input clock rate of 135MHz, each LVDS differential data pair speed is 945Mbps, providing a total throughput of 3.78Gbps. The transmitter can be configured to input clock rising edge or falling edge strobe through an external pin. The EP103B includes the following distinctive features Support 10MHz to 135MHz clock rates for HVGA to SXGA+ resolution Up to 3.78Gbps bandwidth PLL requires no external components Cycletocycle jitter rejection 3.3V to 1.8V Low Voltage TTL tolerant Input Programmable data and control strobe selectV Power down mode supported BGA package (4.5mm x 7mm)
Demander un devisSYSCOM-PROREP
France
The RDK12GCONV UHD Converter Reference Design demonstrates the use of Semtech's GS12241 12G UHDSDI Retiming Adaptive Equalizer, GS12090 Bidirectional 12G UHDSDI Cable Equalizer/Driver, GS12281 12G UHDSDI Retiming Cable Driver, and GS12070 UHDSDI Gearbox to enable conversion from single channel 12Gb/s SDI, quad channel 3Gb/s SDI and other multiplexing or demultiplexing modes while minimizing the port count in designs. This reference design not only allows your evaluation of Semtech products; the source files for the schematic, PCB layout, microcontroller and GUI can be provided by contacting your local FAE to accelerate your time to market. Note This Reference Design assumes familiarization with the Semtech products found onboard the RDK12GCONV. For further information regarding these products, please refer to the following documents
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